Pacemaker
From Computing and Software Wiki
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Information on the Pacemaker Grand Challenge is the first certification challenge problem issued by the [[Software Certification Consortium]] (SCC). It is being hosted by the McMaster University's [http://sqrl.mcmaster.ca Software Quality Research Lab] (SQRL). More detailed documentation on the Pacemaker Challenge can be found at [http://sqrl.mcmaster.ca/pacemaker.htm SQRL]. | Information on the Pacemaker Grand Challenge is the first certification challenge problem issued by the [[Software Certification Consortium]] (SCC). It is being hosted by the McMaster University's [http://sqrl.mcmaster.ca Software Quality Research Lab] (SQRL). More detailed documentation on the Pacemaker Challenge can be found at [http://sqrl.mcmaster.ca/pacemaker.htm SQRL]. | ||
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| + | Detailed questions about the requirements, hardware or pacemakers in general can be found in the [[Pacemaker FAQ]]. | ||
=== Pacemaker Hardware Reference Platform === | === Pacemaker Hardware Reference Platform === | ||
Revision as of 17:00, 20 May 2008
Information on the Pacemaker Grand Challenge is the first certification challenge problem issued by the Software Certification Consortium (SCC). It is being hosted by the McMaster University's Software Quality Research Lab (SQRL). More detailed documentation on the Pacemaker Challenge can be found at SQRL.
Detailed questions about the requirements, hardware or pacemakers in general can be found in the Pacemaker FAQ.
Pacemaker Hardware Reference Platform
The hardware reference platform, developed by students at the University of Minnesota, is based upon an 8-bit PIC18F4520 microcontroller. It include analog filtering for the input signals from the atrial and ventricle as well as programmable resistors to set the sense thresholds and pace amplitude, external 16 bit A/D converters to allow real-time ECG data to be transmitted from the board, a magnetic reed switch (for magnet mode) , a MAX232 for RS-232 serial communication with a PC acting as a Device Controller-Monitor (DCM) and an accelerometer for rate adaptive modes.
A number of the parts used in the original design are not readliy available so we have update the design and produced 5 prototype boards for testing that were used at McMaster University for the Software Engineering Senior Thesis course. Once we have finished debugging the revised design we will be producing an additional 45 board for sale at cost (approx. $350 CDN) to interested students, researchers and industry people.
See the Pacemaker Hardware Reference Platform Details for schematic, Bill Of Materials (BOM) and other details.
